NB4L52 СПЕЦИФІКАЦІЯ,СХЕМИ,ФУНКЦІЇ

NB4L52 Datasheet PDF

• Semiconductor NB4L16M
  2.5V/3.3V, Gb/s Multi Level Clock/Data Input Driver Receiver Buffer Translator with Internal Termination
• Semiconductor NB4L16MMN
  2.5V/3.3V, Gb/s Multi Level Clock/Data Input Driver Receiver Buffer Translator with Internal Termination
• ONSEMI[ON Semiconductor] NB4L16MMNG
  2.5V/3.3V, Gb/s Multi Level Clock/Data Input Driver Receiver Buffer Translator with Internal Termination
• Semiconductor NB4L16MMNR2
  2.5V/3.3V, Gb/s Multi Level Clock/Data Input Driver Receiver Buffer Translator with Internal Termination
• Semiconductor NB4L16MMNR2G
  2.5V/3.3V, Gb/s Multi Level Clock/Data Input Driver Receiver Buffer Translator with Internal Termination
• Semiconductor NB4L339
  3.3V Clock Fanout Buffer
• Semiconductor NB4L33907
  Differential Clock Differential LVPECL Clock Generator Divider Fan−Out Buffer
• Semiconductor NB4L339MNG
  Differential Clock Differential LVPECL Clock Generator Divider Fan−Out Buffer
• Semiconductor NB4L339MNR2G
  Differential Clock Differential LVPECL Clock Generator Divider Fan−Out Buffer
• ON Semiconductor NB4L339_07
  2.5 V / 3.3 V Differential 2:1 Clock IN to Differential LVPECL Clock Generator / Divider / Fan−Out Buffer
• Semiconductor NB4L52
  5.5V D-Flip-flop w/Diff Reset Input Terms
• ONSEMI[ON Semiconductor] NB4L5207
  V/3.3 V/5.0 Differential Data/Clock Flip-Flop with Reset Multi-Level Inputs LVPECL Translator Internal Termination
• Semiconductor NB4L52MNG
  V/3.3 V/5.0 Differential Data/Clock Flip-Flop with Reset Multi-Level Inputs LVPECL Translator Internal Termination
• NB4L52MNR2G
  V/3.3 V/5.0 Differential Data/Clock Flip-Flop with Reset Multi-Level Inputs LVPECL Translator Internal Termination
• ON Semiconductor NB4L52_07
  2.5 V/3.3 V/5.0 V Differential Data/Clock D Flip-Flop with Reset Multi-Level Inputs to LVPECL Translator w/ Internal Termination